发明名称 Metal-metal oxide etch stop/barrier for integrated circuit interconnects
摘要 Described is a method and apparatus for forming interconnects with a metal-metal oxide electromigration barrier and etch-stop. In one embodiment of the invention, the method includes depositing a metal layer on the top of a planarized interconnect layer, the interconnect layer having an interlayer dielectric (ILD) with a top that is planar with the top of an electrically conductive interconnect. In one embodiment of the invention, the method includes reacting the metal layer with the ILD to form a metal oxide layer on the top of the ILD. At the same time, the metal layer will not be significantly oxidized by the electrically conductive interconnect, thus forming a metal barrier on the electrically conductive interconnect to improve electromigration performance. The metal barrier and metal oxide layer together comprise a protective layer. A second ILD may be subsequently formed on the protective layer, and the protective layer may act an etch-stop during a subsequent etch of the second ILD.
申请公布号 US7339271(B2) 申请公布日期 2008.03.04
申请号 US20040861657 申请日期 2004.06.03
申请人 INTEL CORPORATION 发明人 MORROW XIAORONG;LEU JIHPERNG;KUHN MARKUS;MAIZ JOSE A.
分类号 H01L23/52;H01L21/60;H01L21/768;H01L23/532 主分类号 H01L23/52
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