发明名称 Time stamping events for fractions of a clock cycle
摘要 Generally, the embodiments are directed to circuits and methods for time stamping an event at a fraction of a clock cycle. A time stamping circuit comprises two or more detection circuits. The detection circuits receive an event-in signal and generate event signals based on a clock phase at which the event-in signal was received. A decoder receives the event signals and outputs an event-out signal and a time stamp that represents the phase at which the event-in signal was detected. By time stamping the event-in signal to a phase division, the time stamping circuit detects event signals that occur at a rate faster than the clock cycle.
申请公布号 US7339853(B2) 申请公布日期 2008.03.04
申请号 US20050292472 申请日期 2005.12.02
申请人 AGILENT TECHNOLOGIES, INC. 发明人 SRIKANTAM VAMSI KRISHNA;FERNANDEZ ANDEW DAVID;VOOK DIETRICH WERNER
分类号 G04F8/00 主分类号 G04F8/00
代理机构 代理人
主权项
地址