METHOD OF FABRICATING SEMICONDUCTOR DEVICE FOR IMPROVING EXPOSURE ALIGNMENT

摘要

A method for fabricating a semiconductor device for improving an exposure alignment is provided to improve recognition accuracy of an alignment mark by forming a lower metal in an alignment mark region on a scribe lane. A lower metal pad(23') is formed in an alignment mark region on a scribe lane during a lower wiring pattern(23) is formed on a process substrate. An interlayer dielectric is laminated and patterned on the substrate on which the lower metal pad to form a metal contact for opening a part of the lower wiring pattern and to form an alignment mark to be used in the alignment for a wiring forming process at the same time. An upper wiring pattern is formed on the substrate on which the alignment mark is formed. The lower wiring pattern and the upper wiring metal belong to a BEOL(Back End Of Layer challenges) metal wiring. The upper wiring pattern is formed with a damascene process.