发明名称 |
METHOD FOR MANUFACTURING OF SEMICONDUCTOR DEVICE |
摘要 |
A method for manufacturing a semiconductor device is provided to simplify a well forming process and to improve manufacture yield by simultaneously forming an N-well and an N-drift region. A P-type impurity is selectively implanted into an N-type substrate(111). An N-type impurity is selectively implanted into the N-type substrate where the P-type impurity is implanted. A P-type impurity region is diffused downwardly into the upper region by diffusing the P-type impurity and the N-type impurity implanted into an upper region of the N-type substrate at the same time. P-drifts(113a,113b,114) and P-wells(115,116) of a high voltage device and a P-well(127) of a low voltage device are formed in the P-type impurity region. An N-type impurity region is diffused downward the upper region. The N-type impurity region is formed thinner than the P-type impurity region. An N-drift region and an N-well region of the high voltage device and an N-well(118) of the low voltage device are formed in an N-type impurity region. Impurities for controlling a threshold voltage are ion-implanted into channel parts of the high voltage device and the low voltage device. A gate oxide is formed on the high voltage device and the low voltage device. A gate electrode is formed on the gate oxide.
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申请公布号 |
KR100808376(B1) |
申请公布日期 |
2008.03.03 |
申请号 |
KR20060083177 |
申请日期 |
2006.08.30 |
申请人 |
DONGBU ELECTRONICS CO., LTD. |
发明人 |
CHOI, KEE JOON |
分类号 |
H01L21/265;H01L21/3215;H01L21/425;H01L29/15 |
主分类号 |
H01L21/265 |
代理机构 |
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地址 |
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