发明名称 |
Method, apparatus and system for reducing DC coupling capacitance at switching amplifier |
摘要 |
The digital amplifier (300) includes a pulse width modulation signal generator (320) receiving an input signal (AI) and generating an amplified pulse width modulated signal, a filter (330) filtering the amplified pulse width modulated signal and providing the filtered amplified pulse width modulated signal to an input node of a load, and a reference voltage generator (340) providing a reference voltage (VR) to a reference node of the load to reduce a DC component of the filtered amplified pulse width modulated signal provided to the input node of the load. |
申请公布号 |
GB2441218(A) |
申请公布日期 |
2008.02.27 |
申请号 |
GB20070016318 |
申请日期 |
2007.08.21 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD |
发明人 |
SEUNG-BIN YOU;YONG-JIN CHO;SOO-HYOUNG LEE |
分类号 |
H03F3/217 |
主分类号 |
H03F3/217 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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