| 摘要 |
A display device is provided to maintain a proper charging time for a data voltage by adjusting an interval of a clock signal, when an excessively high clock frequency is inputted to the display device. A display device includes a display panel(100), a signal controller(230), and a data driver(220). The display panel includes pixels which are defined by gate and data lines. When a clock signal having a clock frequency higher than a predetermined clock frequency is applied, the signal controller adjusts an output interval of the clock signal, so that a data enable period is maintained at the same value for the predetermined clock frequency. The data driver applies the data voltage and a blank voltage to the pixel corresponding to the clock signal which is outputted from the signal controller.
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