| 摘要 |
Viterbi decoder for decoding a received sequence of data symbols which are coded using a predetermined coding instruction is provided. The Viterbi decoder includes a branch metric calculation circuit for calculation of branch metrics for the received sequence of coded data symbols. The Viterbi decoder includes a path metric calculation circuit for calculation of path metrics as a function of the branch metrics and the coding instruction, with the calculated path metrics in each case being compared with an adjustable decision threshold value in order to produce an associated logic validity value. The Viterbi decoder also includes a selection circuit which temporarily stores those path metrics whose validity value is logic high in a memory, and selects from the temporarily stored path metrics that path with the optimum path metric.
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