| 摘要 |
A serial interface has an input for receiving a digital audio signal and an output for serially outputting bits of the digital audio signal. A shift register includes a serial input connected to the output of the serial interface for storing bits of the digital audio signal. A first-in-first-out (FIFO) buffer has a parallel input connected to a parallel output of the shift register. A digital-to-analog processor is connected to a parallel output of the FIFO. A volume controller initiates loading of bits in the shift register into the FIFO according to a volume control signal to effect a coarse volume adjustment. The volume controller also adjusts resistances of an analog amplifier to effect a fine volume adjustment.
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