发明名称 Microcomputer, a method for protecting memory and a method for performing debugging
摘要 A microcomputer, a method for protecting memory and a method for performing debugging is provided including a TAP controller and instruction decoder for monitoring an external input for a processor, internal registers and comparators for determining whether or not the destination address of an access by the processor to ROM and SRAM is within a predetermined protected area, and internal registers and multiplexers as access control means. If a control instruction for the processor has been detected and an execution of an access from the processor to the protected area has been detected, the destination address of the access is replaced with addresses of a ROM and SRAM of an additional circuitry block that have been prepared by developers.
申请公布号 US7337366(B2) 申请公布日期 2008.02.26
申请号 US20040905139 申请日期 2004.12.17
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 TANIGUCHI MASAYOSHI
分类号 G01R31/28;G06F11/00;G06F11/22;G06F12/14;G06F15/78 主分类号 G01R31/28
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