发明名称 Multiple-output transistor logic circuit
摘要 A logic circuit consists of a first transistor network and a complementary second transistor network connected at a central node. The central node serves as a first logic output. Each of the transistor networks is also connected to a respective root. A third transistor network is connected between an intermediate node of one of the transistor networks and the network's respective root. For a homogeneous graft, the third transistor network has a complementary structure to the transistors between the intermediate node and the central node, is of the same transistor type as the given transistor network, and has inverted inputs relative to the transistors between the intermediate node and the central node. The third transistor network (the graft network) provides a second logic output to the logic circuit.
申请公布号 US7336104(B2) 申请公布日期 2008.02.26
申请号 US20050166248 申请日期 2005.06.27
申请人 TECHNION RESEARCH & DEVELOPMENT FOUNDATION LTD. 发明人 MORGENSHTEIN ARKADIY
分类号 H03K19/20;H03K19/094;H03K19/0948;H03K19/096 主分类号 H03K19/20
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