| 摘要 |
An apparatus includes a pseudo address decoder, a programmable logic array, a corresponding value calculation module, a storage element, a subtracter, and a multiplexer. The pseudo address decoder determines a block corresponding to an index of the compression encoding table. The programmable logic array calculates related data of the block determined by the pseudo address decoder. The corresponding value calculation module calculates the corresponding value in accordance with the related data of the block. Non-repeating or non-increasing data of the compression encoding table are stored in the storage element. The subtracter outputs a difference between the index and the address offset in order to read the storage element. The multiplexer selectively outputs the output values calculated by the corresponding value calculation module or the data read from the storage element.
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