发明名称 |
Semiconductor device having switch circuit to supply voltage |
摘要 |
A memory cell array has memory cells arranged in a matrix form. The memory cell includes a floating gate and a control gate. Word lines are each coupled to the control gates of the memory cells which are arranged on a corresponding one of the rows in the memory cell array. Bit lines are each coupled to drains of the memory cells which are arranged on a corresponding one of the columns in the memory cell array. An external voltage is supplied from the exterior to an external voltage input terminal. A first voltage generating circuit lowers the external voltage to generate a voltage which is to be supplied to the word line coupled to the control gates. A second voltage generating circuit lowers the external voltage to generate a voltage which is to be supplied to the bit line coupled to the drains. |
申请公布号 |
US7336545(B2) |
申请公布日期 |
2008.02.26 |
申请号 |
US20050232999 |
申请日期 |
2005.09.23 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TANZAWA TORU |
分类号 |
G11C5/14;G11C7/12;G11C8/08;G11C16/12;G11C16/14;G11C16/30 |
主分类号 |
G11C5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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