| 摘要 |
PROBLEM TO BE SOLVED: To provide a synchronization clock generating circuit which can be constituted inexpensively. SOLUTION: Full-wave rectifications of angle signals S1 and S2 of two phases output by an angle detector 10 are performed with a first full-wave rectifying circuit 11 and a second full-wave rectifying circuit 12 respectively, the respective full-wave-rectified signals are added with an adding circuit 14, and the dc component of the output signal of the adding circuit 14 is removed with a filter 16. The output signal of the filter 16 is converted into a rectangular wave with a comparator 18 for comparing the output signal with a reference potential, and the phase of the rectangular wave is delayed by a predetermined amount with a phase shifter 20. By performing 1/2 frequency dividing of the output signal of the phase shifter 20, synchronizing it with an excitation signal to be supplied to the angle detector 10 with a synchronized frequency divider circuit 22, a synchronization clock SQ3 is obtained. COPYRIGHT: (C)2008,JPO&INPIT
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