| 摘要 |
A non-volatile memory array featuring cells with split gate transistors and an overall area extent of 5F2, i.e. five times the minimum lithographic feature size squared. While smaller calls are known, the cells of the present invention each have a select device and a floating gate transistor with adjacent cells having shared source-drain lines, all controlled by only four lines including two bit lines, a word line and a select gate line. The lines are extended beyond the boundary of the array where electrical contact is made for random access reading, programming and erasing, i.e. a contactless array.
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