发明名称 MULTIPROCESSOR SYSTEM, SYSTEM BOARD, AND CACHE REPLACEMENT REQUEST HANDLING METHOD
摘要 A multiprocessor system, a system board, and a method for handling a cache replacement request are provided to handle the cache replacement request efficiently by preventing load on a global bus and generation of unnecessary eviction caused from the cache replacement request. A multiprocessor system includes a plurality of system boards(100a-100d) respectively having CPU(120a,120b) and a request handler(114) handling the request issued from the CPU, and an address crossbar board(200) arbitrating the request of each system board. The system board includes a cache replacement request loopback circuit(140) determining whether the request issued from the internal CPU. The cache replacement request loopback circuit transfers the request to the address crossbar board when the determined request is not the cache replacement request, and transfers the request to the internal request handler without transferring the request to the address crossbar board when the determined request is the cache replacement request. The cache replacement request loopback circuit includes a loopback queue keeping the cache replacement request issued from the internal CPU.
申请公布号 KR20080016419(A) 申请公布日期 2008.02.21
申请号 KR20070018303 申请日期 2007.02.23
申请人 FUJITSU LIMITED 发明人 ISHIZUKA TAKAHARU;UEKI TOSHIKAZU;HATAIDA MAKOTO;YAMAMOTO TAKASHI;HOSOKAWA YUKA;OWAKI TAKESHI;ITOU DAISUKE
分类号 G06F15/177;G06F15/16 主分类号 G06F15/177
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