| 摘要 |
PROBLEM TO BE SOLVED: To achieve a delay profile detector circuit for detecting a delay profile at high reliability even when there is multi-path having a long delay time, and a receiver using the same. SOLUTION: A partial segment extractor 912 extracts a segment belonging to a hierarchy transmitted in a high error resistance modulation system from a carrier signal obtained from an FFT unit 905. A reference signal decider 913 performs hard decision of a mapping signal point conformed with the modulation system on the carrier signal of the partial segment to output as a reference signal. A frequency characteristics calculator 914 calculates the frequency characteristics, based on the carrier signal of the partial segment and the decided reference signal. An IFFT unit 915 applies the IFFT to the calculated frequency characteristics to convert into a time-domain signal showing a delay profile and output it. COPYRIGHT: (C)2008,JPO&INPIT
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