发明名称 |
Void boundary structures, semiconductor devices having the void boundary structures and methods of forming the same |
摘要 |
Void boundary structures, semiconductor devices having the void boundary structures, and methods of forming the same are provided. The structures, semiconductor devices and methods present a way for reducing parasitic capacitance between interconnections by forming a void between the interconnections. The interconnections may be formed on a semiconductor substrate. An upper width of each of the interconnections may be wider than a lower width thereof. A molding layer encompassing the interconnections may be formed. A void boundary layer covering the molding layer may be formed to define the void between the interconnections.
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申请公布号 |
US2008042268(A1) |
申请公布日期 |
2008.02.21 |
申请号 |
US20070730276 |
申请日期 |
2007.03.30 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
YU CHEONG-SIK;LEE KYUNG-TAE |
分类号 |
H01L23/48;H01L21/4763 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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