| 摘要 |
PROBLEM TO BE SOLVED: To reduce a leak current during the stoppage of operation (during standby mode) of a logic circuit which operates intermittently, and further to sufficiently supply a driving current to the logic circuit during the operation of the logic circuit. SOLUTION: In a configuration where a power switch connected between the logic circuit and a power source is controlled in accordance with the intermittent operation of the logic circuit, the power switch is configured by cascading an nMOS transistor and a pMOS transistor in this order from a high potential side between a positive power supply potential and a power supply terminal of the logic circuit. A gate potential control circuit is provided which performs control not to conduct the nMOS transistor and the pMOS transistor during operation stop of the logic circuit by bringing a gate terminal of the nMOS transistor to a ground potential and bringing a gate terminal of the pMOS transistor to the positive power supply potential, respectively, and to conduct the transistors during operation of the logic circuit by making the potential of the gate terminal of the nMOS transistor equal with or higher than the positive power supply potential and bringing the gate terminal of the pMOS transistor to the ground potential, respectively. COPYRIGHT: (C)2008,JPO&INPIT
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