| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device reducing the manufacturing costs, the device size thereof and the power consumption thereof by securing a bit line sense margin while reducing the number of divided bit lines. SOLUTION: The semiconductor memory device is provided with: a memory cell array having a plurality of memory cells 10 constituted of transistors and capacitors formed on a semiconductor substrate; a plurality of word lines 13; a plurality of bit lines; and a plurality of sense amplifiers for amplifying signals read from the plurality of memory cells to the bit lines, the plurality of memory cells 10 being connected to the bit lines, the plurality of bit lines being paired and having a plurality of switch circuits 15 for dividing the bit lines for each pair of bit lines 12, and having a plurality of second differential amplifying circuits 16 for amplifying signals read from the memory cells 10. Each pair of bit lines is connected to the sense amplifier 11. COPYRIGHT: (C)2008,JPO&INPIT
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