| 摘要 |
<p>A method of manufacturing a flash memory cell is provided to decrease an area of a source line by removing an insulation layer in an isolation film, thereby lowering source resistance. A doped polysilicon layer(250) having a predetermined thickness is formed on a semiconductor substrate(200) comprising an active region and an isolation region. Plural pairs of gate lines(210) are disposed on the active region, with the source region being interposed between the gate lines. A protective layer(220) is formed around each gate line to isolate the doped polysilicon layer from the gate lines. The protective layer is composed of an oxide layer(220a) and a silicon nitride layer(220b).</p> |
