发明名称 |
ELECTROMIGRATION VERIFICATION DEVICE, ELECTROMIGRATION VERIFICATION METHOD, AND DATA STRUCTURE AND NETLIST USED THEREFOR |
摘要 |
PROBLEM TO BE SOLVED: To achieve both of reduction of area and improvement of wiring reliability of an LSI by accurately deciding the necessity of layout modification for wiring having a plurality of current paths such as power source wiring. SOLUTION: This electromigration verification method includes an electromigration verification processing step comprising: a data input processing step; a netlist update processing step (first processing) for updating a netlist configured of wiring parasitic elements and device elements based on a current density restriction database and a characteristic fluctuation database and wiring current information; a current density calculation processing step (second processing) for calculating the current density of the wiring parasitic element from device currents and the updated netlist; a wiring current information update processing step (third processing) for updating the wiring current information based on the current density; a current density restriction value comparison decision processing step (fourth processing) for deciding whether or not the current density is within the limit from the updated wiring current information and a current density restriction database; a step decision processing process (fifth processing) for deciding the repeated processing from step information; and a result output processing process. COPYRIGHT: (C)2008,JPO&INPIT
|
申请公布号 |
JP2008040534(A) |
申请公布日期 |
2008.02.21 |
申请号 |
JP20060209822 |
申请日期 |
2006.08.01 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
HIRANO SHOZO |
分类号 |
G06F17/50;H01L21/82 |
主分类号 |
G06F17/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|