| 摘要 |
In a virtualisation based system, a Translation Lookaside Buffer (TLB) stores a mapping from a guest address to a host physical address. In response to an instruction and an operand, a logic circuit performs a synchronisation of a mapping from a guest address to a physical address of the host (host physical address) stored in the buffer with a corresponding mapping stored at least in part in an extended paging table (EPT). The synchronisation is based at least in part on the operand of the instruction which comprises at least one of a context descriptor and an EPT pointer. Preferably, the synchronisation comprises updating the mapping stored in the TLB based at least in part on the mapping stored in the EPT, where the mapping in the EPT is stored with the same guest address as the mapping stored in the TLB. The virtualisation based system may be a Virtual Machine Monitor. |
