发明名称 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF TESTING THE SAME
摘要 A semiconductor memory device and a method of testing the same are provided to reduce test time and test cost, by discriminating a read control circuit and a read sense amplifier circuit during a BIST(Built-In Self-Test). A semiconductor memory device comprises a semiconductor memory(11), an automatic operation control circuit(12) outputting a clock signal, a synchronous read control circuit(13), a read control circuit(14), a sense amplifier circuit(15) for read and a judgement circuit(16). The synchronous read control circuit outputs a synchronous read address by being synchronized with the clock signal. A read control circuit selects a read address of the semiconductor memory, according to an address of the synchronous read address. The sense amplifier circuit for read outputs a data read signal, as sensing data read out according to the read address. The judgment circuit compares the data read signal with an expected value.
申请公布号 KR20080015734(A) 申请公布日期 2008.02.20
申请号 KR20070081582 申请日期 2007.08.14
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SUZUKI TAKAHIRO;FUJISAWA SHINYA;HARA TOKUMASA
分类号 G11C29/00;G11C7/06;G11C7/22 主分类号 G11C29/00
代理机构 代理人
主权项
地址