| 摘要 |
<p>A semiconductor memory device that enables the reduction of the circuit scale of the antifuse write voltage generation circuit (42). The semiconductor memory device has a first internal power supply generation circuit (22) that boosts an external power supply voltage (Vdd) to generate a first internal power supply (Vpp), a memory core (10) to which the first internal power supply is supplied, an antifuse memory (40) for writing predetermined information, and also a write voltage generation circuit (44) that boosts the first internal power supply (22) to generate an antifuse write voltage.</p> |
