发明名称 Semiconductor test apparatus
摘要 Good device PASS/FAIL determination is realized by measuring timings of a cross point of differential clock signals CLK and a data signal DATA output from a DUT, and obtaining a relative phase difference between both signals. A semiconductor test apparatus comprises differential signal timing measurement means for outputting cross point information Tcross obtained by a timing of a cross point of one of differential signals, non-differential signal timing measurement means for outputting data change point information Tdata obtained by a timing of transition of a logic of the other non-differential signal output, phase difference calculation means for outputting a phase difference DeltaT between the cross point information Tcross and the data change point information Tdata, and PASS/FAIL determination means for determining PASS/FAIL of a relative positional relationship of the DUT based on a predetermined threshold value.
申请公布号 US7332926(B2) 申请公布日期 2008.02.19
申请号 US20060486825 申请日期 2006.07.14
申请人 ADVANTEST CORP. 发明人 OHASHI MASATOSHI;OKAYASU TOSHIYUKI
分类号 G01R31/28;G01R31/02;G01R31/319;G01R31/3193 主分类号 G01R31/28
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