发明名称 |
Simultaneous deposition and etch process for barrier layer formation in microelectronic device interconnects |
摘要 |
The present invention provides a method of forming a interconnect barrier layer 100 . In the method, physical vapor deposition of barrier material 200 is performed within an opening 140 located in a dielectric layer 135 of a substrate 110 . RF plasma etching of the barrier material 200 that is deposited in the opening 140 occurs simultaneously with conducting the physical vapor deposition of the barrier material 200.
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申请公布号 |
US7332425(B2) |
申请公布日期 |
2008.02.19 |
申请号 |
US20050126460 |
申请日期 |
2005.05.11 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
HAIDER ASAD M.;GRIFFIN, JR. ALFRED J.;TAYLOR KELLY J. |
分类号 |
H01L21/4763 |
主分类号 |
H01L21/4763 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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