发明名称 Wide-band modulation PLL, timing error correction system of wide-band modulation PLL, modulation timing error correction method and method for adjusting radio communication apparatus having wide-band modulation PLL
摘要 A broadband modulation PLL includes a PLL portion containing a voltage controlled oscillator ( 101 ), a frequency divider ( 105 ), a phase comparator ( 104 ) and a loop filter ( 103 ). A frequency-dividing ratio of the frequency divider ( 105 ) is controlled to apply modulation, and also an input voltage of the voltage controlled oscillator ( 101 ) is controlled to apply modulation. One of phase modulation data for controlling the frequency dividing ratio and phase modulation data for input voltage of the voltage controlled oscillator ( 101 ) is inverted in phase by using an inverter ( 113 ), and the delay control circuit ( 110 ) detects a timing error on the basis of a signal ( 133 ) achieved by adding the output signals ( 131 ) and ( 132 ) of the filter ( 106 ) and the loop filter ( 103 ), and the timing is controlled by the delay circuits ( 111 ) and ( 112 ) to correct, the timing error.
申请公布号 US7333789(B2) 申请公布日期 2008.02.19
申请号 US20050529539 申请日期 2005.03.29
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 YOSHIKAWA HIROYUKI;HIRANO SHUNSUKE
分类号 H03C3/00;H04B1/18;H03C3/09;H03L7/18 主分类号 H03C3/00
代理机构 代理人
主权项
地址