发明名称 INTEGRATED CIRCUIT ARRANGEMENT WITH CAPACITOR AND FABRICATION METHOD
摘要 An integrated circuit arrangement contains an insulating region, which is part of a planar insulating layer, and a capacitor which contains: near and far electrode regions near and remote from the insulating region and a dielectric region. The capacitor and an active component are on the same side of the insulating layer, and the near electrode region and an active region of the component are planar and parallel to the insulating layer. The near electrode region is monocrystalline and contains multiple webs. Alternately, a FET is present in which: a channel region is the active region, the FET contains a web with opposing control electrodes connected by a connecting region that is isolated from the channel region by a thick insulating region. The thick insulating region is thicker than control electrode insulation regions. The control electrodes contain the same material as the far electrode region.
申请公布号 US2008038888(A1) 申请公布日期 2008.02.14
申请号 US20070862640 申请日期 2007.09.27
申请人 INFINEON TECHNOLOGIES, AG 发明人 BREDERLOW RALF;HARTWICH JESSICA;PACHA CHRISTIAN;ROSNER WOLFGANG;SCHULZ THOMAS
分类号 H01L21/8242;H01L21/336;H01L21/84;H01L27/06;H01L27/108;H01L27/12;H01L29/786 主分类号 H01L21/8242
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