发明名称 |
Data processing system and method for efficient communication utilizing an Tn and Ten coherency states |
摘要 |
A cache coherent data processing system includes at least first and second coherency domains each including at least one processing unit. The first coherency domain includes a first cache memory and a second cache memory, and the second coherency domain includes a remote coherent cache memory. The first cache memory includes a cache controller, a data array including a data storage location for caching a memory block, and a cache directory. The cache directory includes a tag field for storing an address tag in association with the memory block and a coherency state field associated with the tag field and the data storage location. The coherency state field has a plurality of possible states including a state that indicates that the memory block is possibly shared with the second cache memory in the first coherency domain and cached only within the first coherency domain.
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申请公布号 |
US2008040556(A1) |
申请公布日期 |
2008.02.14 |
申请号 |
US20070835984 |
申请日期 |
2007.08.08 |
申请人 |
FIELDS JAMES S JR;GOODMAN BENJIMAN L;GUTHRIE GUY L;STARKE WILLIAM J;WILLIAMS DEREK E |
发明人 |
FIELDS JAMES S.JR.;GOODMAN BENJIMAN L.;GUTHRIE GUY L.;STARKE WILLIAM J.;WILLIAMS DEREK E. |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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主权项 |
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