| 摘要 |
PROBLEM TO BE SOLVED: To provide a MAC computing circuit adding and multiplying data inputted in series without converting them into parallel data. SOLUTION: In respective bit MAC computing circuits 10-1 to 10-3, a serial input signal SDI is multiplied by coefficients C0-C3 of the corresponding digits by an AND 10, a computing result in the previous step given from a data input terminal DI is added thereto. It is delayed by one clock in an FF 13 for carry (doubling) to be outputted to the following step from a data output terminal DO. In the cascaded MAC computing circuits 10-0 to 10-3, respective digits are added sequentially, and when the result is shifted synchronously with a clock signal CLK to be outputted to the following step for multiplication. In this way, output data OUT resulting from MAC computing result by word unit are outputted in series from the data output DO of the bit MAC computing circuit 10-0 in the final step. COPYRIGHT: (C)2008,JPO&INPIT
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