A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming an intergate dielectric layer over the nanodots, where the intergate dielectric layer encases the nanodots. To form sidewalls of the memory cell, a portion of the intergate dielectric layer is removed with a dry etch, where the sidewalls include a location where a nanodot has been deposited. A spacing layer is formed over the sidewalls to cover the location where a nanodot has been deposited and the remaining portion of the intergate dielectric layer and the nanodots can be removed with an etch selective to the intergate dielectric layer.
申请公布号
WO2008019039(A2)
申请公布日期
2008.02.14
申请号
WO2007US17297
申请日期
2007.08.02
申请人
MICRON TECHNOLOGY, INC.;PRALL, KIRK, D.;SANDHU, GURTEJ, S.