SEMICONDUCTOR INTEGRATED CIRCUIT AND TRANSMITTER APPARATUS HAVING THE SAME
摘要
<p>A semiconductor integrated circuit (10D) receives parallel data signals and a first clock signal to output a serial data signal and a second clock signal. In the semiconductor integrated circuit (10D), a first clock generating circuit (15) generates a third clock signal obtained by multiplying the first clock signal by X/Y. A second clock generating circuit (11), the transfer characteristic of which is variable, generates a fourth clock signal obtained by multiplying the third clock signal by N. A parallel-to-serial converting part (12) converts a parallel data signal as converted by a scaler (16) to a serial data signal in synchronism with the fourth clock signal. A frequency divider (13) generates a fifth clock signal obtained by frequency dividing the fourth clock signal by N. A selector (14) selectively outputs one of the third and fifth clock signals as the second clock signal.</p>
申请公布号
WO2008018325(A1)
申请公布日期
2008.02.14
申请号
WO2007JP65006
申请日期
2007.07.31
申请人
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;KAWABATA, MANABU;YANAGISAWA, RYOGO;IWATA, TORU;SUGIMOTO, HIROKAZU