发明名称 A/D CONVERTER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce variation of a parasitic capacitance caused on a connection wiring when a plurality of resistors are series-connected in an interpolation circuit. SOLUTION: An A/D converter circuit includes a plurality of folding amplifiers for generating and outputting positive-phase signals having a different phase, respectively, and negative-phase signals thereof, the interpolation circuit for generating a plurality of interpolation signals of the same phase and reverse phase from an output of the folding amplifiers, a plurality of comparators for inputting the interpolation signal generated by this interpolation circuit, and an encoder circuit 6 for encoding the output from these comparators. The interpolation circuit divides the plurality of resistors to each predetermined number, juxtaposes a plurality of resistor strings in which the predetermined number of resistors are series-connected on a straight line, connects the resistors at one end of each resistor string with each other for every two strings, respectively, and connects the resistors at the other end of each resistor string with each other for every two strings in a different combination from the combination of the two strings, respectively, thereby connecting the plurality of resistors annularly. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008035440(A) 申请公布日期 2008.02.14
申请号 JP20060209188 申请日期 2006.07.31
申请人 SONY CORP 发明人 TOYOMURA JUNJI;YAMASHITA YUKITOSHI;NAKAMURA SHOGO;KANEKAWA NORIFUMI;ONO KOICHI;OKAWA TAKASHI
分类号 H03M1/14;H03M1/36 主分类号 H03M1/14
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