| 摘要 |
A memory device is described that uses extra data bits stored in a multi-level cell (MLC) to provide error information. An example embodiment provides a memory cell that uses more than 2<SUP>X </SUP>logic levels to store X data bits and an error bit. At least one extra bit provided during a read operation is used to provide error information or a confidence factor of the X data bits originally stored in the cell.
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