CIRCUIT FOR MATCHING CLOCK SIGNAL

摘要

A clock signal matching circuit is provided to transmit data at a high speed by accurately compensating for a phase difference and a duty cycle among clock signals. A clock signal matching circuit includes a delay unit(20), a duty cycle compensator(30), and a control signal generator(40). The delay unit delays a first input signal in response to a phase control signal and outputs a phase delay signal. The duty cycle compensator compensates for duty cycles of a second input signal and the phase delay signal and outputs first and second output signals. The control signal generator compares phases of the first and second output signals with each other and outputs an analog phase control signal. The delay member includes a driver and a signal delay unit. The signal delay unit delays the driver in response to a potential of the phase control signal.