HARMONIC PROCESSING CIRCUIT AND AMPLIFYING CIRCUIT USING THE SAME

摘要

Provided are a harmonic processing circuit having a reduce-sized circuit, and an amplifying circuit using such harmonic processing circuit. The harmonic processing circuit is provided with a first impedance adjusting section and a second impedance adjusting section. The first impedance adjusting section is provided with a coupled distributed constant line (CT). Output from an amplifying transistor (S) is inputted to the coupled distributed constant line (CT) which has a length of 1/4 of a wavelength (?) of a fundamental wave of the output from the amplifying transistor (S). Furthermore, the first impedance adjusting section adjusts input impedance to even-ordered harmonic to substantially infinite or zero. The first impedance adjusting section and the second impedance adjusting section adjust input impedance to odd-ordered harmonic to substantially infinite or zero, opposite to the even-ordered harmonic.