发明名称 |
METHOD AND APPARATUS OF SIMULATING A SEMICONDUCTOR INTEGRATED CIRCUIT AT GATE LEVEL |
摘要 |
A method of simulating a semiconductor integrated circuit (IC) at gate level includes providing a net list including information about a variable power source and a variable ground source, providing a circuit model including the variable power source and the variable ground source, and simulating the net list by using the circuit model at gate level.
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申请公布号 |
US2008040091(A1) |
申请公布日期 |
2008.02.14 |
申请号 |
US20070776174 |
申请日期 |
2007.07.11 |
申请人 |
KIM TAK-YUNG;JANG SUN-YUNG;SONG HYOUNG-SOO |
发明人 |
KIM TAK-YUNG;JANG SUN-YUNG;SONG HYOUNG-SOO |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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