| 摘要 |
A design of a low inductance embedded capacitor layer connection unit is provided to reduce a requested capacitance and provide a low inductance capacitor and an interconnection design. A design of a low inductance embedded capacitor layer connection unit includes two capacitance laminates, three 100 mum layers(100), a polyimide(200), a 35 mum copper foil(300), two copper foils(400,500), dielectric structures(700,900), and a 100 mum BT prepreg(400). Three 100 mum layers are stacked on two capacitance laminates. The polyimide has the 35 mum copper foil. A ceramic capacitor is formed on two copper foils. Two copper foils are formed on the 100 mum BT prepreg of each plane of the stacked structure having two capacitors. A first electrode and a second electrode are the same planar electrode and are separated by a trench. The first electrode forms a coaxial-shape structure by covering the second electrode.
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