| 摘要 |
The present invention is a DMA controller that accesses a transfer source and a transfer destination of a DMA transfer via a bus, that chains a plurality of data segments in the transfer source according to an instruction by an external initiator, and that performs burst-transfer to the transfer destination, and when a boundary data, that is a remaining data after dividing in the bus width units and data less than the bus width, is generated, the boundary data is stored in a boundary data buffer in the DMA controller, the data to be read from the transfer source by the next DMA command and the previously stored boundary data are merged, and the data is burst-transferred to the transfer destination.
|
