发明名称 Microprocessor with independent SIMD loop buffer
摘要 An apparatus comprising detection logic configured to detect a loop among a set of instructions, the loop comprising one or more instructions of a first type of instruction and a second type of instruction and a co-processor configured to execute the loop detected by the detection logic, the co-processor comprising an instruction queue. The apparatus further comprises fetch logic configured to fetch instructions; decode logic configured to determine instruction type; a processor configured to execute the loop detected by the detection logic, wherein the loop comprises one or more instructions of the first type of instruction, and an execution unit configured to execute the loop detected by the detection logic.
申请公布号 US7330964(B2) 申请公布日期 2008.02.12
申请号 US20050273493 申请日期 2005.11.14
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 TRAN THANG M.;CHINNAKONDA MURALIDHARAN S.
分类号 G06F9/40 主分类号 G06F9/40
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