发明名称 |
Match circuit for performance counter |
摘要 |
In one embodiment, the invention is directed to a match circuit for implementation in a general purpose performance counter ("GPPC") connected to a bus carrying debug data. The match circuit comprises logic for activating a match signal when a selected N-bit portion of the debug data matches an N-bit threshold for all bits selected by an N-bit match mask ("mmask"). |
申请公布号 |
US7331003(B2) |
申请公布日期 |
2008.02.12 |
申请号 |
US20030635373 |
申请日期 |
2003.08.06 |
申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
ADKISSON RICHARD W.;JOHNSON TYLER |
分类号 |
G06F11/00;G01R31/28;H02H3/05 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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