DIGITAL TO ANALOG CONVERTER AND SOURCE DRIVER INCLUDING THEREOF

摘要

A DAC and a source driver having the same are provided to decrease a parasitic capacitor at an input terminal of an operational amplifier by adjusting a voltage level on a non-inverted input terminal. Digital data is converted to an analog voltage. A first resistor(11) divides first and second reference voltages and outputs first divided voltages. A first decoder(21) selects one of the first divided voltages in response to upper bit data. A second resistor(12) divides third and fourth reference voltages and outputs plural second divided voltages. A second decoder(22) selects one of the second divided voltages in response to lower bit data. A sample and hold circuit includes first and second capacitors and outputs an analog voltage in response to output voltages from the first and second decoders. The sample and hold circuit samples the output voltage from the first decoder through the first capacitor during a sample mode. During a hold mode, the sample and hold circuit adds the outputs from the first and second decoders to each other through the first and second capacitors.