| 摘要 |
A data output circuit for a semiconductor memory device is provided to improve data read speed by reducing loading of a global input/output line by controlling the output of a single multiplexer. A multiplexer(30) outputs a plurality of global input/output lines selectively according to a control signal. A control part(40) generates the control signal with an operation mode signal corresponding to data width and an address signal provided for data selection. A multiplexer driving part(50) amplifies the output of the multiplexer and transfers the amplified output to a data input/output pin. The multiplexer comprises a switching unit outputting corresponding data selectively in response to the control signal at each global input/output line.
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