发明名称 Structure and method to implement dual stressor layers with improved silicide control
摘要 An example embodiment for a method of fabrication of a semiconductor device comprises the following. We provide a substrate with a first device region and a second device region. We provide a first type FET transistor in the first device region and provide a second type FET transistor in the second device region. We form an etch stop layer over the first and second device regions and forming a first stressor layer over the first device region. The first stressor layer puts a first type stress on the substrate in the first device region. We form a second stressor layer over the second device region. The second stressor layer puts a second type stress on the substrate in the second device region. Another example embodiment is the structure of a dual stress layer device having an etch stop layer.
申请公布号 US2008026523(A1) 申请公布日期 2008.01.31
申请号 US20060495508 申请日期 2006.07.28
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING, LTD AND INTERNATIONAL BUSINESS MACHINES CORPORATION (IBM) 发明人 LEE YONG MENG;YANG HAINING S.;CHAN VICTOR;LIM ENG HUA
分类号 H01L21/8238 主分类号 H01L21/8238
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