| 摘要 |
The invention relates to an amplifier circuit comprising supply terminals ( 12, 14 ) for supplying the circuit with first and second supply potentials (Vdd, Vss); a current path, which runs from the first supply terminal ( 12 ) via a first biased transistor (P 1 a, P 1 b), a first node (K 1 a, K 1 b), an input transistor (Q 1 a, Q 1 b), a second node (K 2 a, K 2 b) and a second biased transistor (N 1 a, N 1 b) to the second supply terminal ( 14 ), wherein a control terminal of the input transistor is loaded with an input signal (inp-inn), and wherein the second node (K 2 a, K 2 a) forms a pick-up in a resistor chain (R 2 a, R 1 , R 2 b) , at whose ends is supplied an output signal (outp-outn) as a voltage drop; and a feedback stage enabling the current to flow the resistor chain (R 2 a, R 1 , R 2 b) dependent on the input signal (inp-inn) so that the current flowing through the input transistor (Q 1 a, Q 1 b) is essentially independent of the input signal (inp-inn), wherein the feedback stage has a pair of complementarily coupled transistors (P 3 a, N 3 a, P 3 b, N 3 b) with an intervening current output node (K 3 a, K 3 b). To increase the scope of application of such an amplifier and achieve a low noise amplification at a low current consumption, provision is made, according to the invention, for the complementarily coupled transistors (P 3 a, N 3 a, P 3 b, N 3 b) to be designed as FETs and the first node (K 1 a, K 1 b) to be connected on the one hand via a third biased transistor (N 2 a, N 2 b) to the second supply terminal ( 14 ) and on the other hand to a gate terminal of one (N 3 a, N 3 b) of the complementarily coupled transistors (P 3 a, N 3 a, P 3 b, N 3 b).
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