| 摘要 |
PROBLEM TO BE SOLVED: To minimize increase in the load for verification of timing using a verification tool, even if PVT condition points, to be confirmed with respect to the result of wiring layout-routing, is increased. SOLUTION: With respect to the result of the wiring layout-routing of the cells decided considering the first PVT condition, a wiring layout-routing method of supporting wiring layout routing of cells simply evaluates (S11) the delay of a signal path decided by wiring layout-routing processing, based on delay data concerning cell operation delay and routing delay on a data table on a first PVT condition, and evaluates (S12) the delay in the signal path on a second PVT condition, based on the product of evaluation coefficients (α,β) and the delay in the signal path used in the first evaluation processing. The evaluation coefficients are coefficients for regulating two or more delay times, calculated with respect to the optional combination of the cell operation delay and the routing delay on the first PVT condition, with respect to two or more delay times calculated to the optional combination of the cell operation delay and the routing delay on the second PVT condition as a linear function. COPYRIGHT: (C)2008,JPO&INPIT
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