发明名称 |
MEMORY SYSTEM HAVING SELF TIMED DAISY CHAINED MEMORY CHIPS |
摘要 |
A memory system having a memory controller and a memory. The memory comprises one or more daisy chains of self timed memory chips. An address/command word is chained through a daisy chain of memory chips and is handled by one of the memory chips in the daisy chain of memory chips. Data to be written to a memory chip is sent as part of the address/command word, or is transferred on an outgoing data bus chain. Data read from a memory chip is transferred on an incoming data bus chain. Access timing on a memory chip is determined by a self time block on the memory chip.
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申请公布号 |
US2008028176(A1) |
申请公布日期 |
2008.01.31 |
申请号 |
US20060459957 |
申请日期 |
2006.07.26 |
申请人 |
BARTLEY GERALD KEITH;BECKER DARRYL JOHN;DAHLEN PAUL ERIC;GERMANN PHILIP RAYMOND;MAKI ANDREW BENSON;MAXSON MARK OWEN |
发明人 |
BARTLEY GERALD KEITH;BECKER DARRYL JOHN;DAHLEN PAUL ERIC;GERMANN PHILIP RAYMOND;MAKI ANDREW BENSON;MAXSON MARK OWEN |
分类号 |
G06F13/00 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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