| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a wafer which can reduce the number of contact pins for a test pad or probe card by decreasing the number of test signals. <P>SOLUTION: At least three pads 10A, 10B and 10C are provided in a scribe line 8 between adjacent chip regions 2. The three pads are a power pad 10A connected to a power potential part 5 in the chip region 2, a grounding pad 10B connected to a ground potential 6 in the chip region 2, and a switching pad 10C connected to a semiconductor device 7 in the chip region 2 for switching the operational state of the semiconductor device 7 between a normal operational state and a standby state. Upon a wafer test, the three pads 10A, 10B, and 10C are contacted with contact pins 9A, 9B, and 9C of a probe card respectively. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
