发明名称 Verstärkerausgangsstufe mit Begrenzer für parasitäre Ströme
摘要 The circuit acts to limit parasitic current arising when second transistor is saturated, and acts like a parasitic transistor. The output stage for an amplifier comprises first and second transistors (T1 and T2) having their main current paths situated between the supply terminals (VCC and GND). The biasing terminal of the first transistor (T1) is connected to the output of the amplifier. The biasing terminal of the second transistor (T2) is connected to the amplifier input via a bias circuit (BC). The bias circuit comprises a detection module intended to signal the second transistor to move into saturation, and an impedance matching module which is intended, when activated, to attribute a high impedance to the second transistor when it is saturated.
申请公布号 DE69937770(D1) 申请公布日期 2008.01.31
申请号 DE1999637770 申请日期 1999.04.20
申请人 NXP B.V. 发明人 CHEVALLIER, GILLES
分类号 H03F1/32;H03F1/52;H03F1/08;H03F3/30 主分类号 H03F1/32
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