Memory Controller for Daisy Chained Self Timed Memory Chips

摘要

A memory controller for controlling a daisy chain of self timed memory chips. The memory controller has information as to how long each self timed memory chip in the daisy chain of memory chips takes to make a read access and a write access to an array on the self timed memory chip. The memory controller determines current access time information on a memory chip by sending a command to the memory chip. The memory chip returns a data word containing the current access time information. Alternatively, the memory controller transmits an address/command word to the memory chip and, after completing an access, transmits a responsive data word to the memory controller. The memory controller determines the access time information using the interval from transmission of the address/command word to reception of the responsive data word.